The present disclosure relates generally to capacitor structures, and more particularly, to capacitor structures with geometric arrangement that may reduce parasitic effects.
This section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present disclosure, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present disclosure. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
Many electronic devices include electronic circuits that employ capacitors in its circuit boards (e.g., printed circuit board) to perform functions such as energy storage, filtering, tuning, impedance matching, filtering, and other purposes. These electronic devices may also have shielding structures, such as a shield ground plane, a grounding layer, a shield lid, a ground rail, or a sputter, which may be used to prevent or mitigate interference from the environment to components of the circuit device. As the dimension of consumer products reduce, the spacing between the components attached to the circuit board may decrease. For example, reduction in the dimensions may bring the shielding structures closer to the capacitors. The presence of the grounding structures in proximity with the capacitors may lead to parasitic interferences that were not considered during the design of the circuit board, and may lead to loss of performance of malfunction of the electronic device.